Intel’s 2013 Haswell microarchitecture to use transactional memory, increasing multi-core performance

When Intel announced its Haswell next generation processor microarchitecture (the one after Ivy Bridge) in September of last year, it said that it would re-invent the notebook. We already knew that the 22nm platform would offer a 30 percent power savings over Sandy Bridge, and now the company has let loose a few more details: Haswell is going to use transactional memory, which Intel is calling Transactional Synchronization Extensions (TSX), to allow high performance on multicore processors while keeping the programming familiar for developers. As explained in an Intel blog post, without TSX the system locks shared resources when they’re modified by a thread and prevents other threads from making changes until the lock is disengaged. The problem is that multiple threads could safely work at the same time so long as they didn’t overlap, but in order to keep programming efficient (and easier to troubleshoot), locks cover large areas.

Intel explains that with TSX multiple threads are allowed to work concurrently where they weren’t before, so long as they don’t attempt to access or modify the same resources at the same time — if they do, a locking system will be implemented, and one process will happen after the other. According to the company, this will increase performance (as fewer operations will have to be delayed due to locks) while working in a way that developers are already comfortable with. If you’re worried about compatibility, you’ll be glad to hear that Intel’s first implementation of TSX will play nice with the traditional locking method if you’re not on a Haswell chip.